US 12,080,553 B2
Semiconductor device and method of manufacture
Chung-Ting Ko, Kaohsiung (TW); Sung-En Lin, Hsinchu County (TW); and Chi On Chui, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jun. 21, 2021, as Appl. No. 17/353,380.
Claims priority of provisional application 63/188,150, filed on May 13, 2021.
Prior Publication US 2022/0367187 A1, Nov. 17, 2022
Int. Cl. H01L 21/768 (2006.01); H01L 21/02 (2006.01); H01L 21/033 (2006.01); H01L 29/66 (2006.01)
CPC H01L 21/0338 (2013.01) [H01L 21/02181 (2013.01); H01L 21/0234 (2013.01); H01L 21/02356 (2013.01); H01L 21/0332 (2013.01); H01L 21/0335 (2013.01); H01L 21/0337 (2013.01); H01L 21/76805 (2013.01); H01L 21/76895 (2013.01); H01L 29/66795 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, the method comprising:
forming a gate structure in a gate trench overlying a semiconductor fin, the gate structure comprising a gate electrode and a first gate mask overlying the gate electrode;
forming a first liner layer in the gate trench above the gate structure;
forming a second gate mask material in the gate trench and above the first liner layer;
etching the second gate mask material such that a top surface of the second gate mask material is lower than a top surface of the first liner layer;
forming a second liner layer overlying the first liner layer and the second gate mask material; and
using a crystallization process to simultaneously crystallize the first liner layer and the second liner layer.