| CPC G11C 29/52 (2013.01) [G11C 29/021 (2013.01); G11C 29/022 (2013.01)] | 19 Claims |
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1. A method of error correction code (ECC) decoding of a memory controller that controls a nonvolatile memory device, the method comprising:
reading normal read data from a nonvolatile memory device based on normal read voltages;
performing a first ECC decoding with respect to the normal read data;
setting a flip range based on distribution data indicating degeneration degree of retention characteristics of the nonvolatile memory device;
when the first ECC decoding results in failure, reading flip read data from the nonvolatile memory device based on flip read voltages corresponding to the flip range of a threshold voltage;
generating corrected read data based on the flip read data by inverting error candidate bits included in the flip range among bits of the normal read data; and
performing a second ECC decoding with respect to the corrected read data.
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