a plurality of memory cells connected to each of a plurality of word lines;

a peripheral circuit configured to perform a program operation, including a plurality of program loops, on memory cells that are connected to a selected word line, among the plurality of word lines; and

a control logic configured to, while a program voltage is applied to the selected word line, control the peripheral circuit to apply a first pass voltage to adjacent word lines that are adjacent to the selected word line, and then apply a second pass voltage higher than the first pass voltage to the adjacent word lines,

wherein the control logic adjusts an application time of the second pass voltage as the plurality of program loops proceed.