CPC G11C 16/26 (2013.01) [G11C 16/0425 (2013.01); G11C 16/14 (2013.01); G11C 16/3431 (2013.01)] | 20 Claims |
1. A memory device, comprising:
a plurality of non-volatile memory cells each comprising a first gate; and
a control circuitry to:
program a selected non-volatile memory cell of the plurality of non-volatile memory cells to an initial program state so that the selected non-volatile memory cell achieves a target read current when a target threshold voltage is applied to the first gate of the selected non-volatile memory cell during read operations, wherein the programing of the selected non-volatile memory cell includes apply a program voltage having a first value to the first gate,
store the first value in a memory,
read the selected non-volatile memory cell in a first read operation using a read voltage applied to the first gate of the selected non-volatile memory cell that is less than the target threshold voltage for the first gate to generate a first read current, and
subject the selected non-volatile memory cell to additional programming in response to a determination that the first read current is greater than the target read current, wherein the additional programming comprises:
retrieve the first value from the memory,
determine a second value greater than the first value, and
program the selected non-volatile memory cell that includes applying a program voltage having the second value to the first gate.
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