| CPC G09G 3/3266 (2013.01) [G09G 3/3225 (2013.01); G09G 3/3241 (2013.01); G09G 5/008 (2013.01); G09G 5/18 (2013.01); G09G 2230/00 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/08 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/0202 (2013.01); G09G 2310/0216 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0223 (2013.01); G09G 2320/0686 (2013.01); G09G 2330/021 (2013.01); G09G 2340/0435 (2013.01); G09G 2340/0442 (2013.01); G11C 19/28 (2013.01)] | 20 Claims |
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1. A display device comprising:
a pixel unit comprising first pixels disposed in a first area and second pixels disposed in a second area;
an emission driver configured to sequentially supply emission signals of a turn-off level to the first pixels and the second pixels based on a first start signal, a first clock signal, and a second clock signal; and
a first scan driver configured to sequentially supply first scan signals of a turn-on level to the first pixels based on a second start signal, the first clock signal, and the second clock signal, and sequentially supply the first scan signals of the turn-on level to the second pixels based on a third start signal, the first clock signal, and the second clock signal, wherein the emission driver and the first scan driver share the first clock signal and the second clock signal,
wherein a plurality of emission stages of the emission driver and a plurality of first scan stages of the first scan driver have substantially a same circuit configuration and are alternately arranged.
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