US 12,079,558 B2
On-the-fly multi-bit flip flop generation
Deepak D. Sherlekar, Cupertino, CA (US); Basannagouda Reddy, Ontario (CA); and Shanie George, Mountain View, CA (US)
Assigned to Synopsys, Inc., Sunnyvale, CA (US)
Filed by Synopsys, Inc., Sunnyvale, CA (US)
Filed on May 8, 2023, as Appl. No. 18/144,685.
Application 18/144,685 is a division of application No. 17/318,647, filed on May 12, 2021, granted, now 11,681,848.
Claims priority of provisional application 63/024,426, filed on May 13, 2020.
Claims priority of provisional application 63/023,632, filed on May 12, 2020.
Prior Publication US 2023/0274064 A1, Aug. 31, 2023
Int. Cl. G06F 30/392 (2020.01); G06F 30/3947 (2020.01); G06F 111/20 (2020.01); G06F 119/06 (2020.01); G06F 119/12 (2020.01)
CPC G06F 30/392 (2020.01) [G06F 30/3947 (2020.01); G06F 2111/20 (2020.01); G06F 2119/06 (2020.01); G06F 2119/12 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
identifying control components and flip-flop components in a cell;
defining a first flip-flop block to contain a first portion of the flip-flop components;
defining a control block to contain the control components;
generating a flexible multi-bit flip-flop (FlexMBFF) instance based on routing of shared signals pathways from the control block to the first flip-flop block; and
defining, based on the FlexMBFF instance, a FlexMBFF family that includes a plurality of control blocks and a plurality of flip-flop blocks with different characteristics.