US 12,079,517 B2
Buffer allocation for reducing block transit penalty
Kishore Kumar Muchherla, Fremont, CA (US); Peter Feeley, Boise, ID (US); Jiangli Zhu, San Jose, CA (US); Fangfang Zhu, San Jose, CA (US); Akira Goda, Tokyo (JP); Lakshmi Kalpana Vakati, San Jose, CA (US); Vivek Shivhare, Milpitas, CA (US); Dave Scott Ebsen, Minnetonka, MN (US); and Sanjay Subbarao, Irvine, CA (US)
Assigned to MICRON TECHNOLOGY, INC., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 21, 2022, as Appl. No. 17/870,139.
Prior Publication US 2024/0028259 A1, Jan. 25, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
receiving a write command including user data, wherein the write command is directed to a portion of memory including a first block and a second block;
allocating a buffer for executing the write command to write the user data to the first block, the buffer comprising a plurality of buffer decks;
writing a first portion of the user data to a first buffer deck of the plurality of buffer decks;
programming the user data into the first block to a threshold percentage, wherein the threshold percentage is less than one hundred percent of the first block;
invalidating the first buffer deck in response to programming the first block to the threshold percentage;
reallocating the first buffer deck to the second block for writing the user data to the second block; and
writing a second portion of the user data to the first buffer deck.