a first comparative digit line;

pillars extending upwardly from the first comparative digit line, the pillars comprising semiconductor material; each of the pillars including, in ascending order, a first source/drain region, a channel region, and a second source/drain region; the first source/drain regions being coupled with the first comparative digit line;

a second comparative digit line coupled with the second source/drain regions; the first and second comparative digit lines being comparatively coupled to one another through sense-amplifier-circuitry;

each of the pillars having a first sidewall surface and an opposing second sidewall surface along a cross-section;

gating structures adjacent the first sidewall surfaces and vertically overlapping the channel regions; each of the gating structures including a first component which is electrically floating, a second component which is coupled with driver circuitry, and a ferroelectric material between the first and second components; and

conductive structures adjacent the second sidewall surfaces and vertically overlapping the channel regions, the conductive structures being configured to drain excess carrier from the channel regions and thereby alleviate floating body effects.