US 12,079,168 B2
System and method for error-resilient data compression using codebooks
Joshua Cooper, Columbia, SC (US); Aliasghar Riahi, Orinda, CA (US); Mojgan Haddad, Orinda, CA (US); Ryan Kourosh Riahi, Orinda, CA (US); Razmin Riahi, Orinda, CA (US); and Charles Yeomans, Orinda, CA (US)
Assigned to ATOMBEAM TECHNOLOGIES INC., Moraga, CA (US)
Filed by AtomBeam Technologies Inc., Moraga, CA (US)
Filed on Sep. 4, 2023, as Appl. No. 18/460,676.
Application 18/460,676 is a continuation of application No. 18/078,907, filed on Dec. 9, 2022, granted, now 11,748,309.
Application 18/078,907 is a continuation of application No. 17/233,813, filed on Apr. 19, 2021, granted, now 11,550,756, issued on Jan. 10, 2023.
Application 17/233,813 is a continuation in part of application No. 17/180,439, filed on Feb. 19, 2021, granted, now 11,366,790, issued on Jun. 21, 2022.
Application 17/180,439 is a continuation in part of application No. 16/923,039, filed on Jul. 7, 2020, granted, now 11,232,076, issued on Jan. 25, 2022.
Application 16/923,039 is a continuation in part of application No. 16/716,098, filed on Dec. 16, 2019, granted, now 10,706,018, issued on Jul. 7, 2020.
Application 16/716,098 is a continuation of application No. 16/455,655, filed on Jun. 27, 2019, granted, now 10,509,771, issued on Dec. 17, 2019.
Application 16/455,655 is a continuation in part of application No. 16/200,466, filed on Nov. 26, 2018, granted, now 10,476,519, issued on Nov. 12, 2019.
Application 16/200,466 is a continuation in part of application No. 15/975,741, filed on May 9, 2018, granted, now 10,303,391, issued on May 28, 2019.
Claims priority of provisional application 63/140,111, filed on Jan. 21, 2021.
Claims priority of provisional application 63/027,166, filed on May 19, 2020.
Claims priority of provisional application 62/926,723, filed on Oct. 28, 2019.
Claims priority of provisional application 62/578,824, filed on Oct. 30, 2017.
Prior Publication US 2023/0409533 A1, Dec. 21, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 16/174 (2019.01); G06F 3/06 (2006.01)
CPC G06F 16/1752 (2019.01) [G06F 3/0608 (2013.01); G06F 3/0641 (2013.01); G06F 3/067 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A system for error-resilient data reduction, comprising:
a computing device comprising a memory, a processor, and a non-volatile data storage device;
a data deconstruction engine comprising a first plurality of programming instructions stored in the memory of, and operating on a processor of, the computing device, wherein the first plurality of programming instructions, when operating on the processor, cause the computing device to:
train an encoding algorithm on sourceblocks at multiple phases, wherein each phase comprises a distinct starting bit offset of a respective sourceblock;
deconstruct incoming data into a plurality of sourceblocks;
encode the sourceblocks into codewords using the encoding algorithm and a reference codebook; and
send the codewords to a data reconstruction engine; and
a data reconstruction engine comprising a second plurality of programming instructions stored in the memory of, and operating on a processor of, the computing device, wherein the second plurality of programming instructions, when operating on the processor, cause the computing device to:
decode received codewords into decoded sourceblocks using the key-value pairs stored within the reference codebook; and
for each decoded sourceblock, determine if the decoded sourceblock has exceeded a predetermined threshold probability that the decoded sourceblock was properly encoded, wherein the decoded sourceblock is in-phase if the threshold is exceeded and the decoded sourceblock is out-of-phase if the threshold is not exceeded.