US 12,079,154 B2
Non-transparent bridge selection
Jonathan Krasner, Coventry, RI (US); Ro Monserrat, Medfield, MA (US); Jerome Cartmell, Millis, MA (US); and Thomas Mackintosh, Boston, MA (US)
Assigned to Dell Products, L.P., Hopkinton, MA (US)
Filed by Dell Products, L.P., Hopkinton, MA (US)
Filed on Jan. 10, 2023, as Appl. No. 18/152,257.
Prior Publication US 2024/0232120 A1, Jul. 11, 2024
Int. Cl. G06F 13/40 (2006.01); G06F 13/42 (2006.01)
CPC G06F 13/4221 (2013.01) [G06F 13/4009 (2013.01); G06F 2213/0026 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method of implementing non-transparent bridge selection in a storage engine including multiple unequally shared Non-Transparent Bridge (NTB) resources including a plurality of NTB links interconnecting a local compute node and a peer compute node within the storage engine, comprising:
implementing host Input/Output (IO) device memory access operations on a peer memory in a peer compute node by host IO devices residing on the local compute node, the host IO devices being connected to the peer memory by a first subset of the NTB links to a peer Peripheral Component Interconnect Express (PCIe) root complex in the peer compute node;
implementing storage software memory access operations on the peer memory in the peer compute node by storage software instantiated on the local compute node, the storage software being configured to access the peer memory by both the first subset of the NTB links to the peer PCIe root complex in the peer compute node and by a second subset of the NTB links to the peer PCIe root complex in the peer compute node;
arbitrating usage of the first subset of the NTB links and the second subset of the NTB links by the storage software, to cause a first subset of the storage software memory access operations on the peer memory to be implemented on the first subset of the NTB links and to cause a second subset of the storage software memory access operations on the peer memory to be implemented on the second subset of the NTB links, while causing all of the host IO device memory access operations on the peer memory to be implemented on the first subset of the NTB links.