CPC G06F 13/1673 (2013.01) [G06F 1/10 (2013.01); G06F 11/0757 (2013.01); G06F 11/3037 (2013.01); G06F 12/0882 (2013.01); G06F 18/2148 (2023.01)] | 20 Claims |
1. A method of operating a memory device, the method comprising:
receiving a write command from a memory controller;
receiving data including pattern data and write data from the memory controller through a signal transmission path;
generating check result information by performing a first operation of checking a state of the signal transmission path by using the pattern data;
performing a second operation of writing the write data to a page buffer circuit;
receiving a confirmation command from the memory controller; and
writing, in response to the confirmation command, the write data stored in the page buffer circuit to memory cells.
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