CPC G06F 12/0607 (2013.01) [G06F 12/0238 (2013.01); G06F 13/1668 (2013.01)] | 28 Claims |
1. A method of accessing a memory in a physical memory space, comprising:
receiving a logical line address (LLA) from a processor;
converting the LLA from a logical memory space to a physical line address (PLA) and a physical channel address (PCA) in the physical memory space, and
accessing the memory based on the PLA and the PCA;
wherein:
the physical memory space includes an array of memory regions and memory channels;
a memory device stores one line of data at a line address, wherein a line includes a series of one or more data bytes;
a first memory region has a different number of available memory channels than a second memory region;
within each memory region that has multiple available memory channels, memory accesses based on subsequent logical line addresses result in memory accesses in different available memory channels identified by different physical channel addresses; and
converting the LLA from the logical memory space to the PLA and the PCA in the physical memory space comprises:
in a first circuit:
determining a memory region from the LLA; and
determining a region relative address (RRA) from the LLA;
in a second circuit:
determining an interleave factor (IF) associated with the memory region;
determining a device line address (DLA) by dividing the RRA by the IF; and
determining an uncorrected channel address (UCA) from a remainder of dividing the RRA by the IF; and
determining the PLA from the DLA and the memory region, and determining the PCA from the UCA and the memory region.
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