CPC G06F 1/26 (2013.01) [H02M 3/04 (2013.01); H03M 7/02 (2013.01)] | 20 Claims |
1. A circuit comprising:
a coarse resolution decoder configured to receive a voltage identification (VID) signal; and to decode the VID signal to generate a first digital signal;
a fine resolution decoder configured to receive the VID signal and to decode the VID signal to generate a second digital signal; and
a multiplexer coupled to the coarse resolution decoder and to the fine resolution decoder, the multiplexer configured to provide the first digital signal as an output signal responsive to a first state of a selection signal and to provide the second digital signal as the output signal responsive to a second state of the selection signal, the first and second states of the selection signal being based on a relative amplitude of the first and second digital signals.
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