CPC G06F 1/08 (2013.01) [G06F 7/582 (2013.01)] | 9 Claims |
1. A clock signal generation circuit comprising:
a triangular wave generation circuit configured to generate a triangular wave signal:
a pseudo-random number generation circuit configured to generate a pseudo-random number signal;
a limiter circuit configured to perform a limitation process of limiting an amount of change per unit time in the pseudo-random number signal and generate the pseudo-random number signal subjected to the limitation process as a limiter signal;
a linear arithmetic circuit configured to generate a frequency control signal by performing a linear arithmetic operation on the triangular wave signal and the limiter signal; and
an oscillator configured to generate a clock signal having a frequency corresponding to the frequency control signal.
|