US 12,078,883 B2
Touch panel
Hideaki Shishido, Atsugi (JP); Daisuke Kubota, Atsugi (JP); and Yusuke Kubota, Atsugi (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed on Nov. 30, 2023, as Appl. No. 18/524,248.
Application 18/524,248 is a continuation of application No. 17/876,719, filed on Jul. 29, 2022, granted, now 11,835,809.
Application 17/876,719 is a continuation of application No. 16/827,279, filed on Mar. 23, 2020, granted, now 11,428,974, issued on Aug. 30, 2022.
Application 16/827,279 is a continuation of application No. 15/155,095, filed on May 16, 2016, granted, now 10,684,500, issued on Jun. 16, 2020.
Claims priority of application No. 2015-107248 (JP), filed on May 27, 2015.
Prior Publication US 2024/0094575 A1, Mar. 21, 2024
Int. Cl. G02F 1/1333 (2006.01); G06F 3/041 (2006.01)
CPC G02F 1/13338 (2013.01) [G06F 3/0412 (2013.01); G06F 2203/04103 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A touch panel comprising:
a first adhesive layer over a first substrate;
a second substrate over the first adhesive layer;
a first transistor, a second transistor, a capacitor, and a touch sensor over the second substrate;
a first insulating layer over the first transistor, the second transistor, and the capacitor;
a second insulating layer over the first insulating layer;
a light-emitting element over the second insulating layer;
a second adhesive layer over the light-emitting element;
a third substrate over the second adhesive layer; and
a light-blocking layer below the first transistor and the capacitor,
wherein the first transistor comprises a first gate electrode, a first semiconductor layer, and a first gate insulating layer between the first gate electrode and the first semiconductor layer,
wherein the second transistor comprises a second semiconductor layer comprising an oxide semiconductor,
wherein the touch panel further comprises:
a first conductive layer over the second substrate; and
a second conductive layer over the first gate insulating layer,
wherein the first conductive layer comprises a first portion configured to function as the first gate electrode of the first transistor and a second portion configured to function as one electrode of the capacitor,
wherein the second conductive layer comprises a first portion in contact with the first conductive layer and a second portion configured to function as one of a source electrode and a drain electrode of the second transistor,
wherein the light-blocking layer overlaps with a channel formation region of the first semiconductor layer, the first portion and the second portion of the first conductive layer, and the first portion of the second conductive layer,
wherein the touch sensor comprises a first wiring and a second wiring,
wherein, when seen from above, the first wiring comprises a portion parallel to a signal line, and
wherein, when seen from above, the second wiring comprises a portion parallel to a scan line.