CPC G01R 31/31724 (2013.01) [G01R 31/31727 (2013.01); G01R 31/3177 (2013.01)] | 20 Claims |
1. A method comprising:
configuring tester channels of an automated test equipment (ATE) system for executing a test pattern, the test pattern including:
test vectors for generating a respective calibration voltage ramp and a respective set of voltage ramps at each input pin of a group of input pins of an integrated circuit device, voltage ramps in the respective set of voltage ramps having different lengths durations and different amplitudes, such that each input pin is driven to reach a first input threshold voltage level during at least one, but not all, of the voltage ramps in the respective set of voltage ramps; and
test vectors for checking output values on one or more output pins of the integrated circuit device after each voltage ramp of the respective set of voltage ramps;
executing the test pattern, wherein executing the test pattern causes the tester channels to:
set, in a drive mode, the group of input pins to initial voltage levels; and
apply, in a receive mode, a respective load current to each input pin of the group of input pins to generate the respective calibration voltage ramp and the respective set of voltage ramps at the input pin;
estimating, for each input pin of the group of input pins, a slope of the respective set of voltage ramps, based on results of executing a section of the test pattern for generating the respective calibration voltage ramp; and
determining, for each input pin of the group of input pins, input threshold voltage levels of the input pin based on the slope of the respective set of voltage ramps and results of executing the test pattern, the input threshold voltage levels of the input pin including the first input threshold voltage level.
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