US 12,078,671 B2
Method and apparatus of testing circuit, and storage medium
Cheng Gu, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Jun. 22, 2022, as Appl. No. 17/808,138.
Claims priority of application No. 202210025329.8 (CN), filed on Jan. 11, 2022.
Prior Publication US 2023/0221365 A1, Jul. 13, 2023
Int. Cl. G01R 31/28 (2006.01); G01R 31/317 (2006.01)
CPC G01R 31/2853 (2013.01) [G01R 31/31707 (2013.01); G01R 31/31724 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A method of testing a circuit, comprising:
determining a preset circuit module in a to-be-tested circuit and a preset node in the preset circuit module;
inputting a test signal to an input terminal of the to-be-tested circuit according to a preset input rule, and obtaining a signal of the preset node in the preset circuit module; and
determining a status of the preset circuit module based on the obtained signal of the preset node; and,
wherein the inputting a test signal to an input terminal of the to-be-tested circuit according to a preset input rule comprises:
inputting a plurality of test signals to the input terminal of the to-be-tested circuit successively according to a preset sequence; and
the method of testing a circuit applied to a first stage of a design process of a target circuit, wherein the to-be-tested circuit comprises a part of the target circuit;
the method of testing a circuit applied to a second stage of a design process of a target circuit, wherein the to-be-tested circuit comprises a part of the target circuit or all of the target circuit; or
the method of testing a circuit applied to a design completion stage of a target circuit, wherein the to-be-tested circuit comprises a part of the target circuit or all of the target circuit.