US 12,408,565 B2
Phase-change memory devices
Tung Ying Lee, Hsinchu (TW); Shao-Ming Yu, Zhubei (TW); and Yu Chao Lin, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Apr. 23, 2024, as Appl. No. 18/643,497.
Application 17/867,460 is a division of application No. 17/072,897, filed on Oct. 16, 2020, granted, now 11,411,181, issued on Aug. 9, 2022.
Application 18/643,497 is a continuation of application No. 17/867,460, filed on Jul. 18, 2022, granted, now 11,997,933.
Claims priority of provisional application 63/001,944, filed on Mar. 30, 2020.
Prior Publication US 2024/0276892 A1, Aug. 15, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H10N 70/00 (2023.01); H10B 63/00 (2023.01); H10N 70/20 (2023.01)
CPC H10N 70/068 (2023.02) [H10B 63/24 (2023.02); H10B 63/80 (2023.02); H10N 70/063 (2023.02); H10N 70/231 (2023.02); H10N 70/826 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a first conductive feature having a bit line pad portion and a bit line portion, the bit line pad portion being larger than the bit line portion, the bit line portion emanating from the bit line pad portion;
a phase-change random access memory cell over the bit line portion of the first conductive feature;
an inter-metal dielectric around the phase-change random access memory cell and the first conductive feature; and
a second conductive feature having a word line pad portion and a word line portion, the word line pad portion disposed over the inter-metal dielectric, the word line portion disposed over the phase-change random access memory cell, the word line pad portion being larger than the word line portion, the word line portion emanating from the word line pad portion.