US 12,408,564 B2
Process-induced forming of oxide RRAM
Takashi Ando, Eastchester, NY (US); Soon-Cheon Seo, Glenmont, NY (US); Youngseok Kim, Upper Saddle River, NJ (US); and Hiroyuki Miyazoe, White Plains, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Nov. 4, 2022, as Appl. No. 18/052,590.
Prior Publication US 2024/0155952 A1, May 9, 2024
Int. Cl. H10N 70/20 (2023.01); H10N 70/00 (2023.01)
CPC H10N 70/023 (2023.02) [H10N 70/24 (2023.02); H10N 70/826 (2023.02); H10N 70/841 (2023.02); H10N 70/8833 (2023.02)] 8 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor structure, the method comprising:
forming a dielectric layer on top of a supporting structure, wherein the dielectric layer has a bottom electrode embedded therein;
forming an oxide layer on top of the bottom electrode;
forming a top electrode on top of the oxide layer;
forming an encapsulation layer to cover the oxide layer and the top electrode;
forming a first interlevel-dielectric (ILD) layer on top of the top electrode;
forming a via contact and a first metal layer in the first ILD layer, wherein the first metal layer is in contact with the top electrode through the via contact;
forming a capping layer on top of the first metal layer; and
causing formation of one or more filaments in the oxide layer.