US 12,408,562 B2
Monolithic silicon Josephson junctions for superconducting qubits
Nicholas Torleiv Bronn, Long Island City, NY (US); Thorsten Muehge, Budenheim (DE); and Mark Mattingley-Scott, Heidelberg (DE)
Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Dec. 8, 2021, as Appl. No. 17/545,207.
Prior Publication US 2023/0180632 A1, Jun. 8, 2023
Int. Cl. H10N 60/12 (2023.01); H10N 60/85 (2023.01)
CPC H10N 60/12 (2023.02) [H10N 60/85 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A device, comprising:
a silicon wafer comprising:
a first doped region formed on a first side of the silicon wafer, wherein the first doped region is superconducting;
a second doped region formed on a second side of the silicon wafer opposite the first side, wherein the second doped region is superconducting; and
a non-doped region layered between the first doped region and the second doped region, wherein the non-doped region acts as a tunnel barrier of a Josephson junction comprising the first doped region, the second doped region, and the non-doped region, wherein a thickness of the non-doped region is defined by a thickness of the silicon wafer and respective depths of the first doped region and the second doped region, and wherein the thickness of the silicon wafer is set by a smart cut process and a polishing process.