US 12,408,549 B2
Display substrate and display device
Bo Zhang, Beijing (CN); Zhenggang Wu, Beijing (CN); and Rong Wang, Beijing (CN)
Assigned to Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 17/771,502
Filed by Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Jul. 5, 2021, PCT No. PCT/CN2021/104546
§ 371(c)(1), (2) Date Apr. 25, 2022,
PCT Pub. No. WO2022/037287, PCT Pub. Date Feb. 24, 2022.
Claims priority of application No. 202010831194.5 (CN), filed on Aug. 18, 2020.
Prior Publication US 2022/0406875 A1, Dec. 22, 2022
Int. Cl. H10K 59/131 (2023.01); H10K 59/121 (2023.01); H10K 85/60 (2023.01)
CPC H10K 85/631 (2023.02) [H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/131 (2023.02)] 19 Claims
OG exemplary drawing
 
1. A display substrate, comprising: a display region and a non-display region surrounding the display region, the non-display region comprising a fan-out region and a bending region, the bending region being located at a side of the fan-out region away from the display region;
a plurality of sub-pixels located in the display region;
a plurality of first data signal lines, located in the display region, electrically connected with the plurality of sub-pixels, and configured to provide data signals to the plurality of sub-pixels;
a plurality of fan-out wires, located in the fan-out region and arranged sequentially along a first direction, the plurality of fan-out wires being electrically connected with the plurality of first data signal lines;
a plurality of second data signal lines, located in the bending region and arranged sequentially along the first direction, the plurality of second data signal lines being electrically connected with the plurality of fan-out wires; and
a plurality of transfer lines, located in the fan-out region and between the plurality of fan-out wires and the plurality of second data signal lines, the plurality of transfer lines electrically connecting the plurality of fan-out wires with the plurality of second data signal lines,
wherein a ratio of a width of at least part of the plurality of transfer lines to a width of the plurality of fan-out wires is 0.5 to 5.5,
wherein the display substrate further comprises a plurality of first connecting electrodes located in the display region, the plurality of first connecting electrodes are respectively connected with the plurality of first data signal lines and the plurality of fan-out wires; and
a first connecting electrode is arranged in a same layer as a fan-out wire connected with the first connecting electrode, and in a different layer from a first data signal line connected with the first connecting electrode.