US 12,408,526 B2
Display panel and display apparatus
Donghui Tian, Beijing (CN); Bo Zhang, Beijing (CN); Zhiwen Chu, Beijing (CN); Rong Wang, Beijing (CN); and Yulong Wei, Beijing (CN)
Assigned to Chengdu BOE Optoelectronics Technology Co., Ltd., Chengdu (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Filed by Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Filed on Aug. 1, 2023, as Appl. No. 18/363,127.
Application 18/363,127 is a continuation in part of application No. 17/428,628, granted, now 11,758,658, previously published as PCT/CN2020/122868, filed on Oct. 22, 2020.
Prior Publication US 2023/0380234 A1, Nov. 23, 2023
Int. Cl. H05K 1/18 (2006.01); H10K 59/131 (2023.01)
CPC H10K 59/131 (2023.02) [H05K 1/189 (2013.01); H05K 2201/10128 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A display panel, having a bonding region for bonding a flexible printed circuit in a peripheral region of the display panel, comprising:
a base substrate;
a plurality of first signal lines on the base substrate; and
a plurality of bonding pins on the base substrate and in the bonding region, the plurality of bonding pins comprising a plurality of first bonding pins respectively electrically connected to the plurality of first signal lines;
wherein the plurality of first signal lines comprise a plurality of first signal line portions substantially parallel to each other, ends of the plurality of first signal line portions closer to the plurality of first bonding pins arranged along a first virtual line; and
the plurality of first bonding pins comprise a plurality of first bonding pin portions, ends of the plurality of first bonding pin portions closer to the plurality of first signal lines arranged along a second virtual line;
wherein the display panel further comprises a plurality of connecting portions respectively connecting the plurality of first signal line portions to the plurality of first bonding pin portions;
the plurality of connecting portions are between the first virtual line and the second virtual line;
a respective first bonding pin portion of the plurality of first bonding pin portions comprises at least two sub-layers of a first sub-layer, a second sub-layer, and a third sub-layer, stacked together; and
a respective connecting portion of the plurality of connecting portions comprises at least one sub-layer of the at least two sub-layers.