| CPC H10K 59/123 (2023.02) [H10K 59/131 (2023.02); H10K 59/173 (2023.02)] | 20 Claims |
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1. A display device comprising:
a substrate;
a transistor on the substrate, the transistor including a first source-drain electrode material pattern, an active layer, and a gate electrode that overlaps the active layer;
a first planarization layer on the first source-drain electrode material pattern of the transistor;
a two or more metal patterns on the first planarization layer, the two or more metal patterns electrically connected to the transistor;
a second planarization layer on the two or more metal patterns; and
a bank on the second planarization layer, the bank including a plurality of openings of different sizes,
wherein the two or more metal patterns are spaced apart at a same interval in regions under the plurality of openings of different sizes.
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