US 12,408,480 B2
Microdevice cartridge structure
Gholamreza Chaji, Waterloo (CA); Ehsanollah Fathi, Waterloo (CA); Pranav Gavirneni, Kitchener (CA); Bahareh Sadeghimakki, Kitchener (CA); and Wissal Mahdi Alayashi, Waterloo (CA)
Assigned to VueReal Inc., Waterloo (CA)
Appl. No. 17/432,432
Filed by VueReal Inc., Waterloo (CA)
PCT Filed Feb. 22, 2020, PCT No. PCT/IB2020/051501
§ 371(c)(1), (2) Date Aug. 19, 2021,
PCT Pub. No. WO2020/170219, PCT Pub. Date Aug. 27, 2020.
Claims priority of provisional application 62/931,023, filed on Nov. 5, 2019.
Claims priority of provisional application 62/894,409, filed on Aug. 30, 2019.
Claims priority of provisional application 62/809,161, filed on Feb. 22, 2019.
Prior Publication US 2022/0149231 A1, May 12, 2022
Int. Cl. H01L 21/66 (2006.01); H01L 25/075 (2006.01); H10H 20/01 (2025.01); H10H 20/857 (2025.01)
CPC H10H 20/01 (2025.01) [H01L 22/32 (2013.01); H01L 25/0753 (2013.01); H10H 20/018 (2025.01); H10H 20/857 (2025.01); H10H 20/0364 (2025.01)] 10 Claims
OG exemplary drawing
 
1. A method of releasing microdevices from an integrated array of microdevices on a substrate the method comprising:
forming the buffer layer on the substrate extendable over a surface of the substrate;
depositing a planarization layer on top of the substrate such that the planarization layer can be cured, wherein a bonding layer is formed on the planarization layer or on a cartridge;
removing a buffer layer from the integrated array to release a microdevice from the array,
wherein the integrated array of microdevices on the substrate comprises planar active layers on the substrate, the planar active layers comprising a first bottom conductive layer, a functional layer and a second top conductive layer.