US 12,408,443 B2
Layout of integrated circuit
Ruei-Yau Chen, Pingtung County (TW); Wei-Jen Wang, Tainan (TW); Kun-Yuan Wu, Kaohsiung (TW); Chien-Fu Chen, Miaoli County (TW); and Chen-Hsien Hsu, Hsinchu County (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on May 8, 2024, as Appl. No. 18/657,811.
Application 18/657,811 is a division of application No. 17/517,642, filed on Nov. 2, 2021, granted, now 12,328,944.
Claims priority of application No. 110135987 (TW), filed on Sep. 28, 2021.
Prior Publication US 2024/0290771 A1, Aug. 29, 2024
Int. Cl. H10D 89/10 (2025.01)
CPC H10D 89/10 (2025.01) 9 Claims
OG exemplary drawing
 
1. An integrated circuit layout, comprising:
an upper cell boundary extending along a first direction;
an upper active region comprising a first edge and a second edge extending along the first direction and adjacent to the upper cell boundary, wherein the first edge is away from the upper cell boundary by a distance D3, the second edge is away from the upper cell boundary by a distance D4;
a first gate line disposed on the upper active region and extending along a second direction to protrude from the first edge of the upper active region by a length L3;
a second gate line disposed on the upper active region and extending along the second direction to protrude from the second edge of the upper active region by a length L4;
a third gate line disposed on the upper active region and extending along the second direction to protrude from the first edge of the upper active region by a length L5, wherein the length L3 is equal to or smaller than the length L5; and
two dummy gate lines disposed at two sides of the upper active region, extending along the second direction, and away from the upper cell boundary by a distance S, wherein the first direction and the second direction are perpendicular, the distance D3, the distance D4, the distance S, the length L3 and the length L4 comprise the relationships:

OG Complex Work Unit Math