US 12,408,440 B2
Method of making amphi-FET structure and method of designing
Chih-Yu Lai, Hsinchu (TW); Chih-Liang Chen, Hsinchu (TW); Chi-Yu Lu, Hsinchu (TW); Shang-Syuan Ciou, Hsinchu (TW); Hui-Zhong Zhuang, Hsinchu (TW); Ching-Wei Tsai, Hsinchu (TW); and Shang-Wen Chang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Jun. 5, 2024, as Appl. No. 18/734,212.
Application 18/360,539 is a division of application No. 17/214,194, filed on Mar. 26, 2021, granted, now 11,764,213, issued on Sep. 19, 2023.
Application 18/734,212 is a continuation of application No. 18/360,539, filed on Jul. 27, 2023, granted, now 12,009,362.
Prior Publication US 2024/0321870 A1, Sep. 26, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H10D 88/00 (2025.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); H01L 21/02 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 23/528 (2006.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01)
CPC H10D 88/101 (2025.01) [G06F 30/392 (2020.01); G06F 30/394 (2020.01); H01L 21/0259 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 23/5283 (2013.01); H10D 30/031 (2025.01); H10D 30/6729 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/118 (2025.01); H10D 84/0128 (2025.01); H10D 84/0149 (2025.01); H10D 84/038 (2025.01); H10D 88/01 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate;
a first gate structure on a first side of the substrate;
a second gate structure on a second side of the substrate, wherein the first side is opposite the second side; and
a gate via extending through the substrate, wherein the gate via directly connects to the first gate structure, and the gate via directly connects to the second gate structure.