US 12,408,439 B2
Integrated chip (IC) having conductive TSV extended through SOI substrate comprising a semiconductor device layer, an insulating layer and a metal layer
Harry-Hak-Lay Chuang, Zhubei (TW); Hsin Fu Lin, Hsinchu (TW); and Chien Hung Liu, Hsinchu County (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Aug. 9, 2021, as Appl. No. 17/397,160.
Claims priority of provisional application 63/214,846, filed on Jun. 25, 2021.
Prior Publication US 2022/0415929 A1, Dec. 29, 2022
Int. Cl. H01L 23/522 (2006.01); H01L 21/762 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H10D 87/00 (2025.01)
CPC H10D 87/00 (2025.01) [H01L 21/76283 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 23/53228 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated chip (IC), comprising:
a device layer comprising semiconductor material, the device layer having a four-sided outermost perimeter as viewed from above;
an interconnect structure disposed over the device layer when viewed in a cross-sectional view;
an insulating layer having an upper surface in direct contact with a lower surface of the device layer when viewed in the cross-sectional view, the insulating layer having an outermost four-sided perimeter as viewed from above, wherein the outermost four-sided perimeter of the insulating layer is identical in size and shape to the four-sided outermost perimeter of the device layer;
a metal layer that is a single continuous metal body, an entirety of an uppermost surface of the metal layer being in direct contact with a lowermost surface of the insulating layer when viewed in the cross-sectional view, the single continuous metal body of the metal layer having an outermost four-sided perimeter as viewed from above, wherein the outermost four-sided perimeter of the single continuous metal body of the metal layer is identical in size and shape to the outermost four-sided perimeter of the insulating layer and the four-sided outermost perimeter of the device layer;
a conductive structure having vertical outer sidewalls that extend continuously from an upper surface of the device layer, through the insulating layer, and to a bottom surface of the metal layer when viewed in the cross-sectional view;
a first isolation structure separating the vertical outer sidewalls of the conductive structure from the device layer, the first isolation structure having a bottom surface that terminates at an interface where a lower surface of the device layer meets an upper surface of the insulating layer; and
a second isolation structure separating the vertical outer sidewalls of the conductive structure from the metal layer, the second isolation structure having a top surface that terminates at an interface where a lower surface of the insulating layer meets an upper surface of the metal layer, wherein the insulating layer separates the top surface of the second isolation structure from the bottom surface of the first isolation structure.