US 12,408,436 B2
Display device
Jin Sung An, Seongnam-si (KR); Seok Je Seong, Seongnam-si (KR); Seong Jun Lee, Seoul (KR); and Ji Seon Lee, Hwaseong-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do (KR)
Filed by Samsung Display Co., Ltd., Yongin-si (KR)
Filed on Jul. 1, 2024, as Appl. No. 18/760,784.
Application 18/760,784 is a continuation of application No. 18/239,470, filed on Aug. 29, 2023, granted, now 12,062,665.
Application 18/239,470 is a continuation of application No. 18/100,170, filed on Jan. 23, 2023, granted, now 11,798,956, issued on Oct. 24, 2023.
Application 18/100,170 is a continuation of application No. 17/144,273, filed on Jan. 8, 2021, granted, now 11,594,558, issued on Feb. 28, 2023.
Claims priority of application No. 10-2020-0028653 (KR), filed on Mar. 6, 2020.
Prior Publication US 2024/0355835 A1, Oct. 24, 2024
Int. Cl. H10D 86/60 (2025.01); G09G 3/3291 (2016.01); H10D 86/40 (2025.01); H10K 59/131 (2023.01)
CPC H10D 86/60 (2025.01) [H10D 86/441 (2025.01); G09G 3/3291 (2013.01); G09G 2300/0426 (2013.01); H10K 59/131 (2023.02)] 29 Claims
OG exemplary drawing
 
1. A display device, comprising:
a first transistor including:
a first channel of a first active pattern including a silicon semiconductor; and
a first gate electrode overlapping the first channel of the first active pattern;
a second transistor including:
a second channel of the first active pattern; and
a second gate electrode overlapping the second channel of the first active pattern and extending in a first direction;
a third transistor including:
a third gate electrode extending in the first direction;
a first channel of a second active pattern including an oxide semiconductor and extending in a second direction perpendicular to the first direction; and
a first upper electrode overlapping the first channel of the second active pattern and electrically connected to the third gate electrode of the third transistor;
a fourth transistor including:
a fourth gate electrode extending in the first direction;
a second channel of the second active pattern; and
a second upper electrode overlapping the second channel of the second active pattern and electrically connected to the fourth gate electrode of the fourth gate electrode of the fourth transistor; and
a conductive pattern including:
a connection pattern electrically connecting the first gate electrode of the first transistor to the second active pattern, contacting a region between the first channel and the second channel of the second active pattern, and including a portion extending in a third direction crossing both the first direction and the second direction.