US 12,408,427 B2
Crown bulk for FinFET device
Chih-Chuan Yang, Hsinchu (TW); and Yu-Kuan Lin, Taipei (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 27, 2022, as Appl. No. 17/874,421.
Application 17/874,421 is a division of application No. 16/827,315, filed on Mar. 23, 2020, granted, now 11,587,927.
Claims priority of provisional application 62/907,258, filed on Sep. 27, 2019.
Prior Publication US 2022/0367459 A1, Nov. 17, 2022
Int. Cl. H10D 84/85 (2025.01); H01L 21/3065 (2006.01); H01L 21/308 (2006.01); H10D 30/01 (2025.01); H10D 62/13 (2025.01); H10D 62/17 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01)
CPC H10D 84/854 (2025.01) [H01L 21/3065 (2013.01); H01L 21/308 (2013.01); H10D 30/0217 (2025.01); H10D 62/151 (2025.01); H10D 62/371 (2025.01); H10D 84/0191 (2025.01); H10D 84/0193 (2025.01); H10D 84/038 (2025.01); H10D 84/856 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming an anti-punch-through layer over a first region and a second region of a substrate, wherein the first region and the second region of the substrate are of opposite conductive types;
forming a semiconductor layer over the anti-punch-through layer;
patterning the semiconductor layer and the anti-punch-through layer to form a first plurality of fins over the first region and a second plurality of fins over the second region;
forming a patterned resist layer over the first plurality of fins and the second plurality of fins, wherein a portion of the substrate between the first plurality of fins and the second plurality of fins is exposed in an opening of the patterned resist layer; and
recessing the portion of the substrate between the first plurality of fins and the second plurality of fins, such that a top surface of the portion of the substrate between the first plurality of fins and the second plurality of fins is below a first semiconductor surface extending within the first plurality of fins and a second semiconductor surface extending within the second plurality of fins.