| CPC H10D 84/038 (2025.01) [H01L 21/31144 (2013.01); H10D 30/024 (2025.01); H10D 30/62 (2025.01); H10D 64/017 (2025.01); H10D 84/017 (2025.01); H10D 84/0188 (2025.01); H10D 84/0193 (2025.01); H10D 84/853 (2025.01)] | 20 Claims |
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1. A method for manufacturing a semiconductor device, comprising:
forming first and second semiconductor fins extending upwardly from a substrate;
forming a dielectric fin between the first and second semiconductor fins;
forming a shallow trench isolation (STI) structure laterally surrounding lower portions of the first and second semiconductor fins and the dielectric fin;
forming a gate strip extending across upper portions of the first semiconductor fin, the dielectric fin, and the second semiconductor fin;
patterning the gate strip to form a recess separating the gate strip into a first gate structure extending across the first semiconductor fin and a second gate structure extending across the second semiconductor fin while leaving the dielectric fin uncovered; and
after patterning the gate strip, depositing a high-k dielectric material in the recess, over the dielectric fin, and in contact with a longitudinal end of the first gate structure and a longitudinal end of the second gate structure, wherein the high-k dielectric material forms a vertical interface with the dielectric fin, and wherein the first gate structure forms an interface with a bottom surface of the high-k dielectric material.
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