| CPC H10D 62/115 (2025.01) [H10B 12/01 (2023.02); H10B 12/488 (2023.02); H10D 84/83 (2025.01)] | 19 Claims |
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1. A semiconductor device comprising:
a substrate;
a plurality of transistors located on the substrate, wherein the plurality of transistors each comprises an active cylinder, wherein the active cylinder comprises a channel region, a source region and a drain region disposed on opposite sides of the channel region, a first doped region disposed between the source region and the channel regions, and a second doped region disposed between the drain region and the channel region;
wherein the first doped region, the source region, the second doped region and the drain region comprise doping ions of a first type, and
wherein a doped concentration of the first doped region is lower than a doped concentration of the source region, and a doped concentration of the second doped region is lower than a doped concentration of the drain region; and
wherein each of the active cylinders extends along a first direction, wherein the active cylinders are arranged in an array along a second direction and a third direction, wherein the first direction and the second direction are both parallel to a top surface of the substrate, wherein the first direction intersects the second direction, and wherein the third direction is perpendicular to the top surface of the substrate direction;
wherein the semiconductor device further comprises:
a plurality of word lines extending along the second direction, wherein the plurality of word lines continuously covers the channel regions in the active cylinders spaced at intervals along the second direction; and
wherein the plurality of word lines are arranged at the intervals along the third direction, and wherein among two adjacent ones of the plurality of word lines along the third direction, one of the two adjacent word lines closer to the substrate protrudes from the other of the two word lines along the third direction.
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