| CPC H10D 30/701 (2025.01) [H10D 30/024 (2025.01); H10D 30/0415 (2025.01); H10D 30/6211 (2025.01); H10D 64/689 (2025.01); H10D 84/0144 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01)] | 20 Claims |

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1. A method, comprising:
forming a first fin on a substrate, the first fin including a channel region having a first width;
forming a second fin on the substrate, the second fin including a channel region having a second width larger than the first width;
forming first and second spacers on the first fin;
forming third and fourth spacers on the second fin;
forming a gate dielectric layer on at least three sides of the first fin and on at least three sides of the second fin;
forming a ferroelectric layer having a first thickness on the gate dielectric layer;
annealing the ferroelectric layer;
thinning a portion of the ferroelectric layer that is on the first fin to a second thickness smaller than the first thickness; and
removing a portion of the ferroelectric layer that is on the second fin.
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