US 12,408,377 B2
Semiconductor device structure with backside contact
Feng-Ching Chu, Pingtung County (TW); Wei-Yang Lee, Taipei (TW); and Chia-Pin Lin, Hsinchu County (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jun. 17, 2024, as Appl. No. 18/745,029.
Application 18/745,029 is a continuation of application No. 17/357,052, filed on Jun. 24, 2021, granted, now 12,015,060.
Prior Publication US 2024/0339510 A1, Oct. 10, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/417 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 86/00 (2025.01); H10D 86/01 (2025.01)
CPC H10D 30/6729 (2025.01) [H10D 30/031 (2025.01); H10D 86/00 (2025.01); H10D 86/01 (2025.01); H10D 30/6735 (2025.01); H10D 30/6737 (2025.01); H10D 30/6743 (2025.01); H10D 30/6757 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device structure, comprising:
a stack of channel structures;
a first epitaxial structure and a second epitaxial structure adjacent to opposite sides of the channel structures;
a gate stack wrapped around the channel structures;
a backside conductive contact connected to the second epitaxial structure, wherein the second epitaxial structure is between a top of the backside conductive contact and a top of the gate stack; and
an etch stop layer extending along a sidewall of the backside conductive contact and a bottom of the gate stack.