US 12,408,376 B2
Semiconductor apparatus and manufacturing method for semiconductor apparatus
Yushi Koriyama, Kumamoto (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Appl. No. 18/003,970
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed May 19, 2021, PCT No. PCT/JP2021/019040
§ 371(c)(1), (2) Date Dec. 30, 2022,
PCT Pub. No. WO2022/014152, PCT Pub. Date Jan. 20, 2022.
Claims priority of application No. 2020-119898 (JP), filed on Jul. 13, 2020.
Prior Publication US 2023/0261065 A1, Aug. 17, 2023
Int. Cl. H10D 30/67 (2025.01); H10D 30/01 (2025.01)
CPC H10D 30/6729 (2025.01) [H10D 30/031 (2025.01); H10D 30/673 (2025.01); H10D 30/6758 (2025.01)] 11 Claims
OG exemplary drawing
 
1. A semiconductor apparatus, comprising:
a substrate having a buried insulating film and a semiconductor layer provided on the buried insulating film and formed with a semiconductor element;
a gate electrode provided on the semiconductor layer and having a wiring extending from a central portion of the semiconductor layer to each end portion of the semiconductor layer in a case where the substrate is viewed from above;
a source contact via and a drain contact via which are provided on the semiconductor layer; and
a protruding portion provided near an area where the end portion of the semiconductor layer intersects the wiring of the gate electrode, the protruding portion including a material identical to that of the semiconductor layer and protruding outward from a side surface of the semiconductor layer, wherein
at least part of the end portion of the semiconductor layer has thick film regions each having a larger film thickness than a portion of the semiconductor layer immediately below the gate electrode, and
the source contact via and the drain contact via are provided in areas other than the thick film regions.