US 12,408,370 B2
Structure and fabrication method of high voltage MOSFET with a vertical drift region
Changseok Kang, San Jose, CA (US); Tomohiko Kitajima, San Jose, CA (US); and Gill Yong Lee, Santa Clara, CA (US)
Assigned to APPLIED MATERIALS, INC., Santa Clara, CA (US)
Filed by Applied Materials, Inc., Santa Clara, CA (US)
Filed on Apr. 5, 2022, as Appl. No. 17/714,093.
Prior Publication US 2023/0317845 A1, Oct. 5, 2023
Int. Cl. H10D 30/00 (2025.01); H10D 30/01 (2025.01); H10D 30/65 (2025.01); H10D 62/17 (2025.01)
CPC H10D 30/65 (2025.01) [H10D 30/0281 (2025.01); H10D 62/393 (2025.01)] 10 Claims
OG exemplary drawing
 
1. A transistor comprising:
a well region of a first conductivity type;
a gate region disposed above the well region in a first direction;
a drain region or a source region of a second conductivity type, different from the first conductivity type; and
a drift region of the second conductivity type, comprising:
a lateral portion disposed above a portion of the well region in the first direction, and laterally adjacent to a semiconductor channel in the well region in a second direction perpendicular to the first direction; and
a vertical portion extending vertically from the lateral portion of the drift region to the drain region or to the source region in the first direction.