| CPC H10D 1/47 (2025.01) [H01L 21/26513 (2013.01); H01L 21/268 (2013.01)] | 19 Claims |
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1. A method of forming an integrated circuit, comprising:
first, forming a resistor body and a transistor gate from a semiconductor layer;
second, forming sidewall spacers adjacent the resistor body and the transistor gate;
third, performing a stabilized spike anneal including maintaining a temperature in a range from 500° C. to 600° C. for a period in a range from 20 s to 240 s, then increasing the temperature at a rate exceeding 100° C. per second;
fourth, forming a silicide blocking structure over at least a portion of the resistor body; and
fifth, concurrently millisecond annealing the resistor body and the transistor gate.
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