US 12,408,345 B2
Three-dimensional memory device with backside support pillar structures and methods of forming the same
Shunsuke Takuma, Yokkaichi (JP); Yuji Totoki, Yokkaichi (JP); Seiji Shimabukuro, Yokkaichi (JP); Tatsuya Hinoue, Yokkaichi (JP); Kengo Kajiwara, Yokkaichi (JP); and Akihiro Tobioka, Yokkaichi (JP)
Assigned to Sandisk Technologies, Inc., Milpitas, CA (US)
Filed by SANDISK TECHNOLOGIES LLC, Addison, TX (US)
Filed on Nov. 30, 2023, as Appl. No. 18/524,552.
Application 18/524,552 is a division of application No. 17/146,866, filed on Jan. 12, 2021, granted, now 11,844,222.
Prior Publication US 2024/0099014 A1, Mar. 21, 2024
Int. Cl. H10B 43/10 (2023.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01); H10B 41/27 (2023.01); H10B 41/50 (2023.01); H10B 43/27 (2023.01); H10B 43/50 (2023.01)
CPC H10B 43/50 (2023.02) [H01L 23/5226 (2013.01); H01L 23/562 (2013.01); H10B 41/27 (2023.02); H10B 41/50 (2023.02); H10B 43/27 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor structure, comprising:
forming at least one vertically alternating sequence of continuous insulating layers and continuous sacrificial material layers over a substrate;
forming rows of backside support pillar structures through the at least one vertically alternating sequence;
forming memory stack structures through the at least one vertically alternating sequence, wherein each of the memory stack structures comprises a respective vertical semiconductor channel and a respective vertical stack of memory elements;
forming a two-dimensional array of discrete backside trenches through the at least one vertically alternating sequence such that contiguous combinations of the discrete backside trenches and the backside support pillar structures are formed, wherein the contiguous combinations divide the at least one vertically alternating sequence into alternating stacks of insulating layers and sacrificial material layers, and wherein each of the insulating layers comprises a patterned portion of a respective one of the continuous insulating layers and each of the sacrificial material layers comprises a patterned portion of a respective one of the continuous sacrificial material layers; and
replacing the sacrificial material layers with electrically conductive layers by providing an etchant that etches the sacrificial material layers into the backside trenches and by providing a reactant that deposits the electrically conductive layers into the backside trenches while the backside support pillar structures provide structural support to the insulating layers,
wherein each of the contiguous combinations comprises a respective discrete backside trench and a respective set of two backside support pillar structures each having a respective set of at least one sidewall surface segment that is physically exposed to the respective discrete backside trench upon formation of the discrete backside trenches and prior to etching the sacrificial material layers.