| CPC H10B 41/35 (2023.02) [H01L 23/481 (2013.01); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02)] | 5 Claims |

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2. A three dimensional memory device, comprising:
an alternating stack of insulating layers and electrically conductive layers;
memory openings vertically extending through the alternating stack;
memory opening fill structures located in the memory openings and comprising a respective vertical semiconductor channel and a respective vertical stack of memory elements; and
a backside trench fill structure laterally extending along a first horizontal direction,
wherein:
the backside trench fill structure comprises a backside trench insulating spacer and a backside contact via structure that is laterally surrounded by the backside trench insulating spacer; and
the backside contact via structure comprises:
a first metal layer;
a second metallic nitride liner comprising a nitride of the first metal and contacting an inner sidewall of the first metal layer;
a tapered metallic nitride liner is located inside the second metallic nitride liner; and
at least one core fill conductive material portion that is laterally surrounded by the second metallic nitride liner;
the first metal layer comprises tungsten and the second metallic nitride liner comprises tungsten nitride;
the tapered metallic nitride liner comprises tungsten nitride;
the at least one core fill conductive material portion comprises a tungsten fill material portion having an opposite stress state than the second metallic nitride liner; and
the backside contact via structure further comprises a second metal layer located between the second metallic nitride liner and the at least one core fill conductive material portion.
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