US 12,408,323 B2
Semiconductor memory device and method for manufacturing the same
Seongkeun Cho, Suwon-si (KR); Hee Young Park, Hwaseong-si (KR); Jin Hyung Park, Bucheon-si (KR); Kun Tack Lee, Suwon-si (KR); Jung Hyuk Jang, Suwon-si (KR); and Chun Hyung Chung, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-Do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Oct. 26, 2022, as Appl. No. 18/049,732.
Claims priority of application No. 10-2021-0143385 (KR), filed on Oct. 26, 2021.
Prior Publication US 2023/0128492 A1, Apr. 27, 2023
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/315 (2023.02) [H10B 12/50 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor memory device comprising:
a substrate having a cell area and a peripheral area defined along a periphery of the cell area, wherein the cell area includes an active area defined by a cell element separation film;
a cell area separation film in the substrate and defining the cell area; and
a plurality of storage contacts connected to the active area, and arranged along a first direction,
wherein the plurality of storage contacts includes a first storage contact, a second storage contact, and a third storage contact,
the second storage contact is between the first storage contact and the third storage contact,
each of the first storage contact and the third storage contact defines an airgap, and
the second storage contact is free of an airgap.