US 12,408,322 B2
Semiconductor structure and method for manufacturing the same
Semyeong Jang, Hefei (CN); Joonsuk Moon, Hefei (CN); Deyuan Xiao, Hefei (CN); Minki Hong, Hefei (CN); Kyongtaek Lee, Hefei (CN); and Jo-Lan Chin, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Sep. 26, 2022, as Appl. No. 17/935,567.
Application 17/935,567 is a continuation of application No. PCT/CN2022/102663, filed on Jun. 30, 2022.
Prior Publication US 2023/0014884 A1, Jan. 19, 2023
Int. Cl. H10B 12/00 (2023.01); G11C 5/06 (2006.01)
CPC H10B 12/315 (2023.02) [G11C 5/063 (2013.01); H10B 12/05 (2023.02)] 15 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a base, comprising discrete semiconductor pillars, the semiconductor pillars being disposed at top of the base and extending in a vertical direction;
a dielectric layer for covering sidewalls of the semiconductor pillars;
gate structures disposed in middle area of the semiconductor pillars and comprising a gate-all-around structure, wherein each gate-all-around surrounds the semiconductor pillar, and a first part of the dielectric layer is disposed between the gate structures and the semiconductor pillars; and
a covering layer for covering top of the semiconductor pillars and part of the sidewalls close to the top, wherein material of the covering layer comprises a boron-containing compound;
wherein the gate structure further comprises at least one bridge gate structure;
the at least one bridge gate structure penetrates through the semiconductor pillar and extends to the inner wall of the gate-all-around structure in the penetrating direction; and
the at least one bridge gate structure is disposed in the semiconductor pillar and is disposed corresponding to middle area of the gate-all-around structure.