US 12,408,320 B2
Semiconductor structure and method of manufacturing the same
Tzu-Ming Ou Yang, Taichung (TW); Chun-Chieh Wang, Taichung (TW); and Shu-Ming Lee, Taichung (TW)
Assigned to WINBOND ELECTRONICS CORP., Taichung (TW)
Filed by Winbond Electronics Corp., Taichung (TW)
Filed on Jan. 11, 2022, as Appl. No. 17/572,898.
Claims priority of application No. 110100933 (TW), filed on Jan. 11, 2021.
Prior Publication US 2022/0223598 A1, Jul. 14, 2022
Int. Cl. H10B 12/00 (2023.01); H10D 64/01 (2025.01)
CPC H10B 12/30 (2023.02) [H10B 12/482 (2023.02); H10D 64/021 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate;
bit lines on the substrate, wherein each of the bit lines comprises:
a first conductive layer on the substrate;
a second conductive layer on the first conductive layer; and
a hardmask layer on the second conductive layer;
contacts disposed on the substrate and positioned between two adjacent bit lines, wherein bottom surfaces of the contacts physically contact the substrate, and top surfaces of the contacts are not higher than top surfaces of the hardmask layers adjacent to the contacts, wherein each of the contacts comprises a bottom contact part on the substrate and a top contact part on the bottom contact part, and a width of a top surface of the top contact part is greater than a width of a top surface of the bottom contact part, wherein the top contact part covers a first lower spacer portion and does not cover a second lower spacer portion that are respectively formed on opposite sidewalls of the bottom contact part; and
a plurality of contact plugs respectively disposed on the contacts and partially extending into the contacts, wherein a bottommost portion of each of the contact plugs is disposed within the corresponding contact, and a sidewall of the bottommost portion is in direct contact with a sidewall of the corresponding contact.