US 12,408,318 B2
Semiconductor formation using hybrid oxidation
Somik Mukherjee, Boise, ID (US); Shen Hu, Boise, ID (US); Anish A. Khandekar, Boise, ID (US); Sau Ha Cheung, Boise, ID (US); and Zhiqiang Xie, Meridian, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on May 15, 2019, as Appl. No. 16/413,108.
Prior Publication US 2020/0365596 A1, Nov. 19, 2020
Int. Cl. H10B 12/00 (2023.01); H01L 21/02 (2006.01); H01L 21/762 (2006.01)
CPC H10B 12/053 (2023.02) [H01L 21/02233 (2013.01); H01L 21/76202 (2013.01); H10B 12/34 (2023.02)] 14 Claims
OG exemplary drawing
 
1. A method of forming semiconductor structures, comprising:
forming an opening to create an isolation region in a semiconductor substrate;
performing a first portion of an atomic layer deposition (ALD) at a first oxidation rate into the isolation region;
performing a second portion of the ALD at a second oxidation rate into the isolation region to form a void-free isolation trench; and
forming a buffer area between the semiconductor substrate and the isolation region during performance of the first portion of the ALD.