| CPC H05K 1/111 (2013.01) [H01L 21/4846 (2013.01); H01L 23/49838 (2013.01); H05K 3/067 (2013.01); H10D 86/441 (2025.01); H10D 86/60 (2025.01); H01L 23/49866 (2013.01); H01L 25/0753 (2013.01); H01L 25/167 (2013.01); H05K 1/09 (2013.01); H05K 1/181 (2013.01); H05K 2201/10106 (2013.01); H05K 2201/10151 (2013.01)] | 19 Claims |

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1. A circuit board, comprising:
a base substrate;
a wire arranged on the base substrate, wherein the wire comprises a first conductive layer; and
at least one insulating layer arranged on a side of the first conductive layer away from the base substrate, wherein the at least one insulating layer covers the first conductive layer, wherein
the first conductive layer comprises a first stacked structure on a side away from the base substrate and a second stacked structure proximate to the base substrate; and
the first stacked structure comprises at least an etch stop layer covering the second stacked structure; and
wherein the first stacked structure comprises the etch stop layer, a first metal layer and a first oxidation barrier layer that are sequentially arranged away from the base substrate; and
wherein an orthographic projection of the etch stop layer on the base substrate, an orthographic projection of the first metal layer on the base substrate, and an orthographic projection of the first oxidation barrier layer on the base substrate overlap with one another.
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