US 12,408,267 B2
Method for manufacturing a circuit board with one embedded electronic component
Yong-Chao Wei, Qinhuangdao (CN)
Assigned to QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Huai an (CN); Avary Holding (Shenzhen) Co., Limited., Shenzhen (CN); and GARUDA TECHNOLOGY CO., LTD., New Taipei (TW)
Filed by QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Huai an (CN); Avary Holding (Shenzhen) Co., Limited., Shenzhen (CN); and GARUDA TECHNOLOGY CO., LTD., New Taipei (TW)
Filed on Apr. 1, 2022, as Appl. No. 17/711,255.
Application 17/711,255 is a division of application No. 17/106,363, filed on Nov. 30, 2020, granted, now 11,324,115.
Claims priority of application No. 202011311188.3 (CN), filed on Nov. 20, 2020.
Prior Publication US 2022/0232697 A1, Jul. 21, 2022
Int. Cl. H05K 1/02 (2006.01); H05K 1/18 (2006.01); H05K 3/34 (2006.01); H05K 3/46 (2006.01)
CPC H05K 1/0298 (2013.01) [H05K 1/182 (2013.01); H05K 1/183 (2013.01); H05K 1/184 (2013.01); H05K 1/185 (2013.01); H05K 3/341 (2013.01); H05K 3/4697 (2013.01); H05K 2201/0195 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A method for manufacturing a circuit board comprising:
providing a wiring board comprising a dielectric layer, a first wiring layer, a second wiring layer, and a plurality of spaced conductive pillars, the first wiring layer and the second wiring layer formed on opposite sides of the dielectric layer, each of the plurality of spaced conductive pillars penetrating the dielectric layer and electrically connecting the first wiring layer and the second wiring layer;
attaching a mask on a side of the wiring board, and forming a first opening exposing a part of the dielectric layer and at least two spaced second openings on the mask, wherein each of the at least two spaced second openings is recessed from a sidewall of the first opening toward a direction away from the first opening, and is arranged corresponding to one of the plurality of spaced conductive pillars to expose at least a part of an end surface of the corresponding conductive pillar;
removing a part of the dielectric layer exposed from the first opening and the at least two spaced second openings to form a groove, and the groove not penetrating the dielectric layer, wherein the groove comprises a first recessed portion and at least two spaced second recessed portions, the first recessed portion corresponds to the first opening, each of the at least two spaced second recessed portions is recessed from a sidewall of the first recessed portion toward a direction away from first recessed portion, each of the at least two spaced second recessed portions corresponds to one of the second openings to expose a part of a side wall of the corresponding conductive pillar close to the first recessed portion;
placing a single electronic component in the first recessed portion, wherein the single electronic component comprises at least two spaced connecting pads, each of the at least two spaced connecting pads corresponds to one of the plurality of spaced conductive pillars in the groove; and
filling a conductive material in each of the at least two spaced second recessed portions to form an electrical connecting portion to electrically connect one of the at least two spaced connecting pads and the corresponding conductive pillar.