| CPC H04W 76/19 (2018.02) [H04L 1/1607 (2013.01); H04W 74/0833 (2013.01); H04W 74/0836 (2024.01); H04W 76/18 (2018.02)] | 14 Claims |

|
1. An apparatus, comprising:
a memory; and
a processor coupled to the memory, the processor configured to cause the apparatus to:
perform a 2-step random access (RA) procedure with a base station;
receive a fallback RA response (RAR) from the base station;
perform a 4-step RA procedure with the base station according to the fallback RAR;
set a first index to 2-step RA information of the 2-step RA procedure;
associate the 2-step RA information of the 2-step RA procedure with a 4-step RA information of the 4-step RA procedure by setting a second index to the 4-step RA information of the 4-step RA procedure, wherein the second index of the 4-step RA information follows the first index of the 2-step RA information;
perform another 2-step RA procedure with the base station when the 4-step RA procedure fails and a maximum transmission number of a message A (MSG-A) is not reached; and
set a third index to another 2-step RA information of the another 2-step RA procedure, wherein the third index of the another 2-step RA information follows the second index of the 4-step RA information.
|