| CPC H04W 12/106 (2021.01) [H04W 8/24 (2013.01)] | 18 Claims |

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1. A first device comprising:
at least one processor; and
at least one memory including computer program codes;
the at least one memory and the computer program codes are configured to, with the at least one processor, cause the first device to:
transmit, to a second device, information of data rate for integrity protection which is supported by the first device;
receive from the second device configuration information of the integrity protection, the configuration information indicating that the integrity protection is performed on a portion of a plurality of data packets which are communicated between the first device and the second device; and
apply the integrity protection on the portion of the plurality of data packets based on the configuration information by:
performing the integrity protection on a data packet from the plurality of data packets which is to be transmitted in a protocol data unit;
generating a header of the protocol data unit, the header indicating that the protocol data unit is integrity protected; and
transmitting to the second device the data packet in the protocol data unit with the header.
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