| CPC H04N 25/42 (2023.01) [H04N 25/709 (2023.01); H04N 25/767 (2023.01); H10F 39/8037 (2025.01)] | 13 Claims | 

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               1. A photoelectric conversion apparatus comprising: 
            a plurality of pixel circuits arranged to form a plurality of pixel rows and a plurality of pixel columns; 
                a plurality of signal lines configured to read out signals from the plurality of pixel circuits; 
                a plurality of current sources configured to supply currents to the plurality of signal lines; 
                a switching circuit configured to switch a connection state among the plurality of signal lines and the plurality of current sources; and 
                a control circuit configured to control the connection state of the switching circuit, 
                wherein the plurality of signal lines include a first signal line configured to read out a signal from a first pixel circuit of the plurality of pixel circuits and a second signal line configured to read out a signal from a second pixel circuit included in the same pixel column as that of the first pixel circuit, 
                the plurality of current sources include a first current source and a second current source, 
                the switching circuit can implement 
                a first connection state in which the first signal line and the second signal line are insulated from each other, the first current source is electrically connected to the first signal line, and the second current source is electrically connected to the second signal line, and 
                  a second connection state in which at least the first current source is electrically connected to at least the second signal line, and 
                the control circuit selects the first connection state and reads out a signal from the first pixel circuit and a signal from the second pixel circuit in parallel in a first operation mode, and selects the second connection state and reads out a signal from the first pixel circuit and a signal from the second pixel circuit separately in a second operation mode. 
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