	US 12,407,545 B2
	Spur detection, estimation, and mitigation
Anirudh Reddy Godala, San Diego, CA (US); Yonghee Han, San Diego, CA (US); Jae Won Yoo, San Diego, CA (US); Omar Mehanna, San Diego, CA (US); Andreas Maximilian Schenk, Erlangen (DE); Hari Sankar, San Diego, CA (US); Christos Komninakis, Solana Beach, CA (US); Jing Jiang, San Diego, CA (US); and Wei Yang, San Diego, CA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Feb. 13, 2024, as Appl. No. 18/440,380.
Prior Publication US 2025/0260602 A1, Aug. 14, 2025
Int. Cl. H04L 25/03 (2006.01)

CPC H04L 25/03006 (2013.01)

30 Claims

1. A user equipment (UE), comprising:

one or more memories storing processor-executable code; and

one or more processors coupled with the one or more memories and individually or collectively operable to execute the code to cause the UE to:

transmit information indicating one or more spur parameters that correspond to one or more frequency spurs associated with the UE;

receive, after transmission of the information, a control message indicating a rate matching pattern for one or more subsequent communications for the UE, wherein the rate matching pattern is based at least in part on the one or more spur parameters that correspond to the one or more frequency spurs associated with the UE; and

communicate one or more messages in accordance with the rate matching pattern for the UE.