US 12,407,358 B1
Method for adaptive calibration of a digital-to-analog converter (DAC)
Fazil Ahmad, Irvine, CA (US); Afshin Mellati, Aliso Viejo, CA (US); Espen Olsen, Tustin, CA (US); Pera Florin, Dunrobin (CA); Quanli Lu, Coto de Caza, CA (US); Liang Fan, Irvine, CA (US); and Cindra Abidin, Irvine, CA (US)
Assigned to Marvell Asia Pte Ltd, Singapore (SG)
Filed by Marvell Asia Pte Ltd, Singapore (SG)
Filed on Apr. 21, 2023, as Appl. No. 18/304,566.
Claims priority of provisional application 63/334,281, filed on Apr. 25, 2022.
Claims priority of provisional application 63/333,139, filed on Apr. 21, 2022.
Int. Cl. H03M 1/10 (2006.01)
CPC H03M 1/1014 (2013.01) 20 Claims
OG exemplary drawing
 
1. Circuitry for dynamically calibrating a time-interleaved digital-to-analog converter (DAC), the circuitry comprising:
DAC circuitry configured to receive a digital input signal and generate an output analog signal; and
DAC modeling circuitry, separate from the DAC circuitry, the DAC modeling circuitry being configured to:
receive the digital input signal and generate a model analog signal,
adjust a digital model, which comprises a plurality of model DAC cells that determine at least one of an offset error and a gain error associated with a plurality of DAC cells of the DAC circuitry based on the model analog signal and the digital input signal, and
generate a DAC error correction signal for the DAC circuitry based on the at least one of an offset error and a gain error.