US 12,407,357 B2
System and method for calibrating a time-interleaved digital-to-analog converter
Albert Molina, Novelda (ES); Kameran Azadet, San Ramon, CA (US); Martin Clara, Santa Clara, CA (US); and Daniel Gruber, St. Andrae (AT)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 23, 2021, as Appl. No. 17/645,785.
Prior Publication US 2023/0208429 A1, Jun. 29, 2023
Int. Cl. H03M 1/10 (2006.01)
CPC H03M 1/1014 (2013.01) 20 Claims
OG exemplary drawing
 
1. A system for calibrating a time-interleaved digital-to-analog converter (DAC), comprising:
a calibration signal generator configured to generate calibration data;
a time-interleaved DAC configured to convert the calibration data to an analog calibration signal, wherein the time-interleaved DAC includes two or more sub-DACs;
an anti-alias filter configured to filter the analog calibration signal;
an observation analog-to-digital converter (ADC) configured to sample, and quantize, the analog calibration signal filtered by the anti-alias filter; and
a mismatch estimation block configured to estimate a frequency response mismatch between the sub-DACs and generate a sub-DAC mismatch correction factor based on an output of the observation ADC,
wherein the calibration signal generator is configured to apply the sub-DAC mismatch correction factor to the calibration data.